Burst Buffers: Flash in the Pan?
SessionStorage
Presenter
Event Type
Exhibitor Forum
TimeWednesday, November 15th4pm -
4:30pm
Location503-504
DescriptionBurst Buffers have been associated with next-gen,
exascale, leading-edge HPC scratch systems for a few
years now. For the performance and capacity requirements
of large scale IO solutions the economics still mandates
a cache approach rather than all-flash. The
implementation of "burst buffers" is becoming mainstream
as solid state inevitably works its way into HPC storage
albeit in a number of guises: classic exascale burst
buffers through to more modest controller caching and a
number of alternatives in between.
This Exhibitor Forum will discuss the relative merits of flash implementations in HPC environments, with respect to economics, usability, performance and manageability and encourages organizations offering flash caching solutions, and implementers of flash caches to contribute to the assessment of this dynamically evolving area of HPC. Specific application verticals which are primarily benefitting from flash in HPC will be discussed and extreme acceleration examples and use cases will also be shared.
This Exhibitor Forum will discuss the relative merits of flash implementations in HPC environments, with respect to economics, usability, performance and manageability and encourages organizations offering flash caching solutions, and implementers of flash caches to contribute to the assessment of this dynamically evolving area of HPC. Specific application verticals which are primarily benefitting from flash in HPC will be discussed and extreme acceleration examples and use cases will also be shared.
Presenter
