Best Practices for Architecting Performance and Capacity
in the Burst Buffer Era
Moderator
Event Type
Panel
Accelerators
File Systems
I/O
Runtime Systems
TimeWednesday, November 15th10:30am -
12pm
Location201-203
DescriptionAs supercomputing sites prepare for exascale – or are
creating plans to take their environments to the next
scale of performance - Burst Buffers and new methods for
innovative deployments of Flash are rapidly becoming an
expectation, and in some cases a mandatory requirement
in large-scale HPC procurements. How will this
game-changing technology disrupt the way
high-performance compute, file and storage systems are
architected? Incorporating a Burst Buffer inherently
changes how you select, procure and aggregate
compute/storage/networking components in order to
achieve performance and capacity goals. This
cache-centric approach promises to eliminate the
performance roadblocks of today’s parallel file systems
and dramatically lower costs by changing IO behavior and
providing significant cost, power, space and cooling
savings. This session will remove ambiguity around
cache-centric approaches by exploring the burst buffer
storage system design for use by large-scale HPC
systems.
